By appropriate selection of taps from a delay line in a delay locked loop (DLL), a frequency synthesizer can be realized. Frequency synthesizers using delay locked loops are described in the above-referenced patent applications.
Often it is desirable or required in an electronic circuit to generate multiple output signals at different frequencies. Heretofore, the only technique for generating such multiple frequency output signals using DLL technology would be the use of multiple delay locked loops. However, the power consumed and circuit complexity required to utilize multiple delay locked loops may be prohibitive.